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\pard\plain \ltrch\loch {\field{\*\fldinst HYPERLINK "https://replit.com/@AustinAppleby/SwiftMelodicAbstractions#main.cpp"}{\fldrslt\f0\fs22 https://replit.com/@AustinAppleby/SwiftMelodicAbstractions#main.cpp}}
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\par\plain {\f0\fs22\b0\i0 Examples of "x' = f(x)"-style programs abound - synchronous logic circuits, state machines, transactions - and actually writing a program that "moves through time in discrete steps" is not particularly difficult. Here's a trivial example in C++: }
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0 struct Program \{}
\par\plain {\f0\fs22\b0\i0    int count = 0;}
\par\plain {\f0\fs22\b0\i0 \};}
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0 Program tick(Program old_p) \{}
\par\plain {\f0\fs22\b0\i0    Program new_p;}
\par\plain {\f0\fs22\b0\i0    new_p.count = old_p.count + 1;}
\par\plain {\f0\fs22\b0\i0    return new_p;}
\par\plain {\f0\fs22\b0\i0 \}}
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0 void main() \{}
\par\plain {\f0\fs22\b0\i0    Program p;}
\par\plain {\f0\fs22\b0\i0    for (int i = 0; i < 10; i++) \{}
\par\plain {\f0\fs22\b0\i0       p = tick(p);}
\par\plain {\f0\fs22\b0\i0       printf("Output %d\\n", p.count);}
\par\plain {\f0\fs22\b0\i0    \}}
\par\plain {\f0\fs22\b0\i0 \}}
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0 At first glance, "constantly overwrite your entire state" seems like a terribly inefficient way to write a program, but it's interesting - this example could be expressed equivalently in Javascript, Python, or just about any other mainstream language. In fact, the "x' = f(x)" model places no real requirements on the host language other than "evaluate functions" and "change state atomically". We can write the same thing in Verilog, which does _not_ in general follow the execution semantics of C++ despite the similarities in syntax:}
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0 module Program(input logic clock);}
\par\plain {\f0\fs22\b0\i0   int count;}
\par\plain {\f0\fs22\b0\i0   initial count = 0;}
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0   always_ff(@posedge clock) begin : tick}
\par\plain {\f0\fs22\b0\i0     count <= count + 1;}
\par\plain {\f0\fs22\b0\i0   end}
\par\plain {\f0\fs22\b0\i0 endmodule}
\par\plain \f0\fs22\b0\i0
\par\plain {\f0\fs22\b0\i0 This example modifies state in place instead of overwriting the whole Program object, but in Verilog doing so is guaranteed to be atomic - the '<=' operator is defined such that the right hand sides of all '<=' expressions are assigned to the left hand sides simultaneously and atomically at the end of the current simulation step. }
\par\plain \f0\fs22\b0\i0
\par\plain \f0\fs22\b0\i0}